WorkShop: Electrical Engineering Department, Technion

You are kindly invited to a Workshop on :

Nanoscale Integrated Systems on Chip

Thursday, December 7, 2006, 14:00 - 17:50
Auditorium Floor 10, Electrical Engineering Building, Technion

Schedule

	14:00 - 14:20	Reception and Registration
	14:20 - 14:30	Opening Notes Prof. Israel Cidon - Dean, Department of Electrical Engineering, Technion
	14:30 - 15:20	Nanoscale System Design Challenges Prof. Eby G. Friedman - Department of Electrical and Computer Engineering, University of Rochester
	15:20 - 15:50	The Challenges of Power Estimation and Power-Silicon Correlation Dr. Yoad Yagil - Intel Israel
	15:50 - 16:20	Coffee Break
	16:20 - 16:50	A Case for Transistor-Level Design Eitan Rosen - Marvell
	16:50 - 17:20	Keep the Clocks Ticking, While Varying Supply Voltages Dr. Ran Ginosar – Department of Electrical Engineering, Technion
	17:20 - 17:50	NROM Flash Memory Design Challenges Eduardo Maayan and Yoram Betser Saifun Semiconductors

For more information please call Gitta Abraham: 04-8294674

www3.ee.technion.ac.il/Sites/WorkShop/nano1

Please register online!